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PIC18F INTERFACING ADE7758 SPI GLITCH

PostPosted: Tue Dec 27, 2016 4:48 pm
by pololo
I am setting up an interface between ADE7758 with PIC18F4520 Using Following Config-

Compiler- XC8 v1.34
IDE- MPLABX 3.45
MCU- PIC18F4520 (Running @ 3.3V) @ 20MHZ Crystal (HS)
PERIF- ADE7758 (Running @5v)@ 10MHZ
CODE: SELECT_ALL_CODE
#pragma config OSC = INTIO7 // Oscillator Selection bits (Internal oscillator block, CLKO function on RA6, port function on RA7)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)

// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT enabled)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)

CODE: SELECT_ALL_CODE
//*******************************DATA READ************************************//
unsigned char SPI_Read(unsigned char REG_ADDR)
{
    unsigned char recv_data=0;
   
    CS = 0;//CS ENABLE
    Delay1TCY(1); //SOME DELAY TO STABILIZE CHIP SELECT
   
    WriteSPI(0X00);//SENDING DEVICE ADDRESS(0X40) WITH READ BIT(READ=1))
    WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE
    recv_data=getcSPI();//GET DATA FROM SLAVE
   
    Delay1TCY(1); //SOME DELAY TO STABALIZE CHIP SELECT
    CS = 1;//CS_DISABLE
   
    return ( SSPBUF ); // RETURN READ DATA
}
//*******************************DATA WRITE************************************//
void SPI_Write(unsigned char REG_ADDR,unsigned char DATA)
{
    CS = 0;//CS ENABLE
    Delay1TCY(1); //SOME DELAY TO STABILIZE CHIP SELECT
   
    //WriteSPI(SPI_SLAVE_ID_W_WRITE);//SENDING DEVICE ADDRESS(0X40) WITH READ BIT(WRITE=1))
    WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE
    WriteSPI(DATA);//SEND DATA INTO SLAVE
   
    Delay1TCY(1); //SOME DELAY TO STABILIZE CHIP SELECT
    CS = 1;//CS_DISABLE

   
}

unsigned long read16bits(char REG_ADDR)
{
    CS=0;
    unsigned long ret=0;
    unsigned int ret1=0;
    unsigned char ret0=0;
    //_delay(10);

    WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE
    ret0=getcSPI();
    WriteSPI(0x00);
    ret1=getcSPI();

   
    CS=1;
    ret=(ret1<<8)|ret0;
    return ret;
}

unsigned long read24bits(char REG_ADDR)
{
    CS=0;
    unsigned char ret1=0;
    unsigned char ret2=0;
    unsigned char ret3=0;
    unsigned long x=0;

    WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE
    WriteSPI(0x00);
    Delay1TCYx(10);
    ret1=SSPBUF;
    WriteSPI(0x00);
    Delay1TCYx(10);
    ret2=SSPBUF;
    Delay1TCYx(10);
    WriteSPI(0x00);
    ret3=SSPBUF;
   
    CS=1;
    x= (ret1<<16)|(ret2<<8)|ret3;
    return x;
   
}
//**************************INITIALIZE SPI AND MCU PORT************************//
void INTI_ADE7758()
{
  CloseSPI(); //TURN OFF SPI MODULE IF IT WAS OPEN
   
//*********************CONFIGURE SPI MASTER DEVICE'S HARDWARE******************//
 
  OpenSPI(SPI_FOSC_64,MODE_10,SMPMID);

//******************INITIALIZE HARDWARE I/O PINS FOR SLAVE DEVICE***********//

  TRISEbits.TRISE2 = 0; // /CS - Output (Chip Select)
  TRISCbits.TRISC5 = 0; // /SDO - Output (Serial Data Out)
  TRISCbits.TRISC4 = 1; // /SDI - Input (Serial Data In)
  TRISCbits.TRISC3 = 0; // /SCK - Output (Clock)
  TRISCbits.TRISC1 = 0; // /RST - Output (MCP23S18 Hardware Reset)

  CS = 1; // DISABLE !CS
   
}

MAIN Function
CODE: SELECT_ALL_CODE
void main(void)
{
      init();//INITIALIZE THE SYSTEM
     
      SPI_Write(OPMODE, 0x00);
     
//******************************WRITE CODE HERE********************************
         while(1)
            {
           
            // phas_a_v=read16bits(ZXTOUT);
           // A=SPI_Read(MMODE);
             B=read24bits(AVRMS);
             //C=read16bits(COMPMODE);
                                   
            }
     

}

Problem with the above Code is -I am able to read 8BIt Register in ADE7758 But When i go to Read 24 or 16BIt Register then There isn't any meaning Full Value that I Receive.