Cytron Technical Forum

When the output pin is simulated in the Logic Analyzer, I can only get ONE CYCLE of the waveform.
In MPLAB, I can see many cycles of the waveform.
In MPLABX, I can get only one cycle.
Can anyone advise how to set it up so we can see multiple cycles of the waveform in MPLABX?

Found that the Logic Analyzer cannot be used for output waveforms below 100Hz.
For 100Hz, I can see only one cycle of the waveform. For higher frequencies, I can see multiple waveforms.
This could be due to a default setting in the Logic Analyzer properties of 10,000 buffer size.
For 10,000 instruction cycles, for a clock frequency of 1MHz, it is right that we can get 1 cycle.

I consider this resolved.